Page 42 - EngineerIT September 2021
P. 42
INDUSTRY, TECHNOLOGY, PRODUCTS and INNOVATION you want to read about
Material data augmentation & AI-powered prediction of material behaviour
est engineers know the situation: you have Altair’s data automation and AI solution approaches ...
Tmeasured many curves, but the one you • increase transparency: users can instantly find existing tests performed on other machines, in other
need is missing! This is where AI helps to fill in labs, or even in other regions.
the data gap: AI enables better predictions from • simplify accessibility: using the existing Material Data Centre, optimised for storing and accessing
measured and simulated data, helping to save material data via browser/API.
cost and effort when matching simulation and • enable better predictions: predict new materials for which there is no prior testing.
test data. The almost infinite variety of materials
and material combinations in thermoplastics, for In addition, Altair® Monarch® automation templates enable the automatic collection of data from
example, makes it impossible to test all material multiple sources, such as test machines, laboratories, or suppliers. As a central database, the Material
variants, especially when taking into account Data Centre simplifies the storage of and access to material data through browser-based interfaces. This
external influences such as aging, chemical allows physical material testing to be reduced by up to 30%, resulting in substantial cost savings through
reaction, or irradiation of the material. faster time to market.
The most Compact 1,6T Ethernet PHY with Up to 800 GbE
Connectivity for Cloud Data Centres, 5G and AI
outers, switches and line cards need higher and support for Ethernet rates from 1 to 800 GbE, Microchip’s META-DX2L Ethernet PHY is an industrial-
Rbandwidth, port density and up to 800 Gigabit temperature-grade device that offers the connectivity versatility, to maximise design reuse across
Ethernet (GbE) connectivity to handle escalating applications ranging from a retimer, gearbox or reverse gearbox to a hitless 2:1 multiplexor (mux). Highly
data centre traffic driven by 5G, cloud services configurable crosspoint and gearbox features make full use of a switch device’s I/O bandwidth to enable
and Artificial Intelligence (AI) and Machine the flexible connections necessary for multi-rate cards that support a wide range of pluggable optics. The
Learning (ML) applications. To deliver the higher PHY’s low-power PAM4 SerDes enables it to support the next-generation infrastructure interface rate for
bandwidth, these designs need to overcome the cloud data centres, AI/ML compute clusters, 5G, and telecom service provider infrastructure, whether
signal integrity challenges associated with the over long-reach direct attach copper (DAC) cables, backplanes, or connections to pluggable optics.
industry’s transition to the 112G (gigabits per “For the 56G generation we introduced the industry’s first terabit PHY, META-DX1 and now we have
second) PAM4 Serialiser/Deserialiser (SerDes) followed with an equally transformative 112G solution that delivers the capabilities system developers
connectivity that is needed to support the need to solve today’s new challenges posed by cloud data centres, 5G networking and AI/ML compute
latest pluggable optics, system backplanes and scale-out,” said Babak Samimi, vice president for Microchip’s communications business unit. “By
packet processors. These challenges can now be delivering up to 1,6T of bandwidth within a low-power architecture and in the smallest footprint, the
overcome with the industry’s most compact, 1.6T META-DX2L PHY doubles the bandwidth of previous solutions on the market while establishing a new
(terabits per second), low-power PHY (physical level of power efficiency.”
layer) solution from Microchip Technology Inc.
with its PM6200 META-DX2L that reduces power META-DX2L is offered in the industry’s smallest package size, 23 x 30 millimeter (mm), which enables the
per port by 35 percent compared to its 56G space savings necessary to deliver the line card port densities demanded by hyperscalers and system
PAM4 predecessor, META-DX1, the industry’s first developers. Product highlights include:
terabit-scale PHY solution. • Dual 800 GbE, Quad 400 GbE and 16x 100/50/25/10/1 GbE PHY
“The industry is transitioning to a 112G • Supports Ethernet, OTN, and Fibre Channel data rates
PAM4 ecosystem for high-density switching, • Supports proprietary data rates for AI/ML applications
packet processing and optics,” said Bob Wheeler, • Integrated 2:1 hitless mux enables high availability/protection architectures
principal analyst for networking at The Linley • Highly configurable crosspoint supporting multi-rate services on any port
Group. “Microchip’s META-DX2L is optimised to • Constant latency, enabling IEEE 1588 Class C/D PTP at the system level
address these demands by bridging line cards to • FEC termination, monitoring and conversion between various interface rates
switch fabrics and multi-rate optics for 100 GbE, • 32 long-reach (LR) capable 112G PAM4 SerDes with programmability to optimize power vs.
400 GbE and 800 GbE connectivity”. performance
With its high-density 1,6T bandwidth, space- • Support for DAC cables, including auto-negotiation and link training
saving footprint, 112G PAM4 SerDes technology, • Industrial-temperature-range support, enabling deployments in outdoor environments
• Complete Software Development Kit (SDK) with hitless upgrade and warm restart capabilities and
compatible with the field-proven META-DX1 SDK
Microchip provides a full set of design-in collateral, reference designs and evaluation boards to support
customers building systems with META-DX2L devices. In addition to Ethernet PHY technology, Microchip
also provides system vendors with a total system solution including PolarFire® FPGAs, the ZL30632 high-
performance PLL, oscillators, voltage regulators and other components that have been pre-validated as a
system with META-DX2L to help bring designs to production faster.
EngineerIT | September 2021 | 40