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ICT 5G
To aid in limiting the impact of intermods under large out- Figures 7 and 8 show examples of ADI’s DPD working in low
of-band blockers, a typical FEM includes second stage bypass and medium power small cell applications. The stimulus shown
switches to reduce gain and to protect the second stage from is for five adjacent 20 MHz LTE carriers with a total of 100 MHz.
being driven into nonlinearity, as shown in Figure 3. Toggling the Typically, LTE requires a minimum of 45 dB ACLR with most
LNA gain reduces the signal chain SNR by one dB but aids in deployments expected to get more than this. ADI runs an ongoing
preserving the overall dynamic range by limiting intermodulation testing lab, always reviewing new PAs of all power classes. Check
distortion caused by these large blockers, more than offsetting the the Power Amplifier Test Report, or consult the factory for the latest
loss of noise performance. Overall, this would result in a worst- details on available DPD technology from ADI as well as a list of
case NF of about 5.7 dB, which is still within the local area (small the latest qualified PAs.
cell) footprint requirement on reference sensitivity. Any remaining
filter requirements are supplied by an antenna filter, and rejection How does it all come together?
can be determined based on the low gain compression point and Figure 9 shows the full signal chain including some of the required
IP3 of the receiver FEM. control signals. For power efficiency, the circuit includes transmit
and receive signalling to enable and disable the amplifiers during
Example transmitter signal chain their respective cycles for TDD. Similarly, this could be used with
When the ADRV9029 is combined with a suitable RF drive FDD to power-off during unused slots to save power then as well.
amplifier, or RFVGA (visit analog.com/rf for more options), and a An LNA switch is also required to change the input switch on the
suitable PA, a compact indoor picocell, outdoor picocell, or outdoor
microcell5 are easily constructed. With only a few other passive
components, these 5G technology devices can be combined to
form a very compact and efficient transmitter design, as shown in
the signal chain in Figure 6. The key advantage to this architecture
is the high level of integration possible, which leads not only
to a very low cost implementation but also to the lowest power
dissipation possible, by utilising the integrated DPD functionality
available on select ADI transceivers.
As shown in Figure 6, the small cell transmitter line-up consists
of a circulator, PA, filter and transceiver. Additionally, the circuit
includes a coupler on the output of the PA that is used to monitor
the output distortion (and can also be used to monitor the VSWR
of the antenna as well as forward power) which can be used with Figure 7: Typical PA spectrum with and without DPD total RF of
DPD to improve the operational efficiency of the transmit function 26 dBm.
and improve spurious performance. While an external DPD can be
used, select ADI transceivers include fully integrated DPD, which
operate on 350 mW or less incremental power depending on the
amount of correction a given PA requires. Lower power PAs will
require less correction and therefore less power consumed by
the DPD. In addition, the integrated DPD reduces the number of
SERDES lanes by one half to the external baseband chip as the
observation receiver SERDES lanes are eliminated completely
and the transmitter payload is reduced, given that the bandwidth
expansion for DPD is handled completely within the transceiver.
An equivalent DPD in an FPGA typically has ten times higher
power and is not effective or power efficient for low power small
cells and massive MIMO. However, by integrating the DPD into the
transceiver, the very low power and small cost effectively enable
DPD to be used even for low power small cells and thus reap the
benefit in efficiency and improved transmit linearity without a heavy Figure 8: Typical PA spectrum with and without DPD total RF of
external computation burden.
37 dBm.
Figure 6: Transmitter signal chain details. Figure 9: Complete transceiver signal chain.
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