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ICT COMMUNICATION

state to the primed ready substate. If using Table 6: Power Consumption of a TDD DMR Profile During Sleep and Detect States Using
power saving Mode 1 or Mode 2, it moves System-Level Power Saving Modes 3, 4, and 5
the idle channel from RF_ON to primed
power-down substate. System-Level Power Consumption (mW)
The transition from normal operation Power Saving
mode to monitor mode is initiated by the Mode Sleep Detect
BBIC after it detects the start of a long Mode 3 100 240
idle time period. In monitor mode, the
BBIC employs system-level power saving Mode 4 65 240
mode 3, mode 4, or mode 5 based on the
configuration set by the BBIC. Both the Mode 5 35 225
ADRV9001 and BBIC go to sleep—except
one ADRV9001 receive channel could to go on until a valid signal is detected. The ADRV9001 then wakes up the BBIC and starts
optionally wake up to perform signal to buffer the valid receive data to make sure the BBIC will not lose any valid data during the
detection periodically. When a valid sleep. After the BBIC fully wakes up, it enables the receive channel to first retrieve all the
signal is found, the ADRV9001 will wake buffered data at a preconfigured higher interface data rate. Then it further disables monitor
up the BBIC and the BBIC will further mode to resume normal operation. Note: the BBIC can set the detect timer to be 0 so that
disable monitor mode to resume normal the ADRV9001 will not perform any signal detection, and instead the BBIC will perform signal
operation. detection and terminate monitor mode by de-asserting the DGPIO pin at any time when a
As shown in figure 9, monitor mode valid signal is found.
consists of three different states: sleep, The ADRV9001 provides multiple signal detection methods to accommodate different
detect and detected. The sleep and detect radio standards, including receive signal strength indicator (RSSI), synchronisation (SYNC),
cycles are controlled through timers. When and fast Fourier transform (FFT). The RSSI method compares the receive signal level with a
the time is up, one state will transition to threshold to determine a valid signal so it can be used for any type of radio standards. SYNC
another state if no valid signal is detected. method detects specific synchronization signal patterns defined by the DMR standard. FFT
The BBIC determines the timer and which method is only applicable for standards using FSK modulation schemes. Therefore, there is
state monitor mode should start with. If a no limitation to use monitor mode to other standards besides the DMR.
valid signal is detected during the detect Table 6 presents the power consumption during the sleep state and detect state utilising
state, the ADRV9001 will transition to different system-level power saving modes in monitor mode during the idle time period for
detected state immediately and wake up the DMR use case shown in Figure 7.
the BBIC. The BBIC then disables monitor Depending on the timer configuration for sleep and detect states, the average power
mode, and the ADRV9001 switches back consumption during monitor mode could be determined. Although the ADRV9001 spends
to normal operation mode. The start of more power performing detection in detect state than sleep state, it allows the BBIC to sleep
monitor mode is triggered by a DGPIO through the entire idle time period, which could result in higher overall system power saving.
pin as in the system-level power saving
mode, since fundamentally these two are Power Consumption Evaluation Through TES
very similar except that monitor mode All the power consumption measurements presented in this article are performed through
incorporates a signal detection capability. the ADRV9001 TES with the ADRV9001 evaluation board (EVB). More information about TES
As a matter of fact, the ADRV9001 can and EVB can be found on the ADRV9002 product page. Both Xilinx® ZC706 and ZCU102 FPGA
dynamically switch between system-level
power saving mode and monitor mode
through an API command.
Figure 10 describes the detailed
timing events happening during monitor
mode for both the ADRV9001 and the
BBIC. When the monitor mode DGPIO
pin is asserted by the BBIC, the BBIC will
enter sleep state and the ADRV9001 will
wait for a configurable initial delay before
going to sleep-detect pattern by using
the configured timers. The ADRV9001
can perform signal detection during the
initial delay to make sure that no signal is
present before going to sleep. The sleep-
detect pattern of the ADRV9001 continues Figure 10: Timing events of ADRV9001 and BBIC during monitor mode.

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